GSoC Google Summer of Code (http://code.google.com/soc/) is a program that offers student developers stipends to write code for various open source projects. Google works with a several open source, free software and technology-related groups to identify and fund several projects over a three month period. Historically, the program has brought together over 1,000 students with over 100 open source projects, to create hundreds of thousands of lines of code. The program, which kicked off in 2005, is now (2007) in its third year. Xiph and Theora The Xiph.Org Foundation is a non-profit corporation dedicated to protecting the foundations of Internet multimedia from control by private interests. The purpose is to support and develop free, open protocols and software to serve the public, developer, and business markets. Theora is the video codec from Xiph, based on the VP3 codec donated by On2 Technologies. Hardware implementation of Theora decoding The First step (analysis of theora decoding process) was studied firstly by Felipe Portavales and after by Leonardo Piga. The conclusion was that the function reconrefframes waste approximately 60% of CPU-time, but functions before have a lot of struct's of decision and few struct's of processing (like multiplication). You can see this on http://svn.xiph.org/trunk/theora-fpga/doc/. Thus, this part isn 't too interesting to be done in Hardware, but he reconrefframes is. Felipe Portavales did the iDCT and Leonardo Piga did the others functions. The VHDL simulation is OK and the synthesis in FPGA is OK too. But, the integration was did with NIOS processor, which is a proprietary processor. The alternative of a nonproprietary processor was the LEON. NIOS has a good interface and good support for FPGA. LEON has a diferent interface and is very flexible. Then, I started to study more about this processor, my first goal from GSoC was to do all the integration of Theora Hardware with LEON. This page describe how to do this integration step by step. About Gaisler Gaisler Research provides a complete framework for the development of processor-based SOC designs. The framework is centered around the LEON processor core and includes a large IP library, behavioural simulators, and related software development tools. www.gaisler.com About GRLIB The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around the common on-chip bus, and use a coherent method for simulation and synthesis. http://gaisler.com/products/grlib/grlib.pdf Choosing a ideal configuration You need first to install the GRLIB (I worked with grlib-gpl-1.0.15-b2149.tar.gz), It is following the instructions on grlib.pdf After you have the GRLIB installed, you can run the "make xconfig" on "grlib/designs/leon3-altera-ep2s60-sdr" (I used the Stratix II EP2S60F672C5ES). There, you can select this component: Component Vendor LEON3 SPARC V8 Processor Gaisler Research AHB Debug UART Gaisler Research AHB Debug JTAG TAP Gaisler Research LEON2 Memory Controller European Space Agency AHB/APB Bridge Gaisler Research LEON3 Debug Support Unit Gaisler Research Generic APB UART Gaisler Research My configuration file: Now, you can run the synthesis of your design (make quartus). FPGA problem pins: You need pay attention in select the suitable design for your FPGA, else you can have problem with pin mapping. 2 - Application on LEON3 libtheora-1.0alpha6, libogg-1.1.3 and sparc-elf-3.4.4-1.0.29 Creat a new path (like /theora_hardware/). Do the download and to unpack the libtheora-1.0alpha6.tar.gz on /theora_hardware/ http://downloads.xiph.org/releases/theora/libtheora-1.0alpha6.tar.gz tar -xzf libtheora-1.0alpha6.tar.gz Do the download and to unpack the libogg-1.1.3.tar.gz on /theora_hardware/libtheora-1.0alpha6/ http://downloads.xiph.org/releases/ogg/libogg-1.1.3.tar.gz tar -xzf libogg-1.1.3.tar.gz Now, you will need to use the BCC (Bare-C Cross-Compiler). BCC is a cross-compiler for LEON2 and LEON3 processors. Do the download and to unpack the sparc-elf-3.4.4-1.0.29.tar.bz2 on /opt/ mkdir /opt tar -C /opt -xjf sparc-elf-3.4.4-1.0.29.tar.bz2 dump_video.c modified and vector of input How we are not running on a Linux, you will need to take care with file functions. You can to comment the fprint, to change the fread's to a vector of inputs and the fwrite will be just a printf. Like this: BUG detected from OGG lib (unaligned address error). How to solve There was a error Bug from OGG lib. IU in error mode (tt = 0x07) 400013a4 e8220011 st %l4, [%o0 + %l1] The trap type 0x07 is a memory access to unaligned address. Some architectures support unaligned stores, but SPARC does not (just in 4 by 4 bytes). I had a luck in to find a report from a group that put the Vorbis decoder on FPGA. It was a master thesis of 2 students http://oggonachip.sourceforge.net/. Then, you just need to type so extra lines in configure.in file (on Ogg library's, /theora_hardware/libtheora-1.0alpha6/libogg-1.1.3/) as follows: AC_CHECK_SIZEOF(short,2) AC_CHECK_SIZEOF(int,4) AC_CHECK_SIZEOF(long,4) AC_CHECK_SIZEOF(long long,8)" Compiling libtheora-1.0alpha6 for LEON3 You can run this script # Export sparc-elf PATH export PATH=/opt/sparc-elf-3.4.4/bin:$PATH # Clean all make distclean cd libogg-1.1.3/ make distclean # Set CROSS-Compiler and parameters export CC=sparc-elf-gcc export CXX=sparc-elf-gcc export CFLAGS='-mv8 -msoft-float -static' # -mv-8 generate SPARC V8 mul/div instructions - needs hardware multiply and divide # -msoft-float emulate floating-point - must be used if no FPU exists in the system #Configure and install OGG lib ./configure --prefix=/homes_export/andre.lnc/gsoc/libtheora6_hard/ --target=sparc-elf --host=sparc-elf --enable-static make make install #Configure and make Theora for LEON (sparc) cd ../ ./configure --prefix=/homes_export/andre.lnc/gsoc/libtheora6_hard/ --target=sparc-elf --host=sparc-elf --enable-static --disable-encode make Using the GRMON jTAG interface GRMON is a general debug monitor for the LEON processor, and for SOC designs based on the GRLIB IP library. We will use this to Load and execution of LEON applications Manual: http://www.gaisler.com/doc/grmon.pdf ftp://gaisler.com/gaisler.com/grmon/grmon-eval-1.1.21.tar.gz Run GRMON with this command: grmon-eval -altjtag -u -altjtag : Connect to the JTAG Debug Link using Altera USB Blaster or Byte Blaster. -u : Put UART 1 in loop-back mode, and print its output on monitor console. Snapgear LINUX support for LEON2 and LEON3 is provided through a special version of the SnapGear Embedded Linux distribution. SnapGear Linux is a full source package, containing kernel, libraries and application code for rapid development of embedded Linux systems. Download: ftp://gaisler.com/gaisler.com/linux/snapgear/snapgear-p33a.tar.bz2 Manual: ftp://gaisler.com/gaisler.com/linux/snapgear/snapgear-manual-1.33.0.pdf Download: ftp://gaisler.com/gaisler.com/linux/snapgear/sparc-linux-1.0.0.tar.bz2 Kernel versions that I am using: linux-2.6.21.1 for MMU system The tool-chain should be installed under /opt : cd /opt tar xjf /sparc-linux-1.0.0.tar.bz2 Add /opt/sparc-linux/bin to your PATH. The SnapGear distribution can be installed anywhere: tar -xjf snapgear-p33a.tar.bz2 General instructions on how to use SnapGear linux is provided with the distribution. Testing After programmer your FPGA with LEON3, you can open the GRMON with this command: ./grmon-eval -altjtag -nb -abaud 38400 -nosram The GRMON should be started with -nb to avoid going into break mode on a page-fault or data exception. Problem with SRAM I disabled the SRAM (-nosram) because I had just 2 Mbit of SRAM on my FPGA, then I needed to load the kernel on SDRAM. But, I was having problems of memory mapping. Thus, I decided disable the SRAM. Serial and jTAG Dbg Link. The "-abaud 38400" set application baudrate for UART 1. In order to have a konsole interface from linux you need to connect a serial cable with you computer. Then, you can use a program like "kermit" that provides a serial communication with your linux konsole on FPGA. Some FPGA´s has 2 serial connectors, BE SURE that you are using the suitable connector!. I am using the follow configuration of kermit: set line /dev/ttyS0 define sz !sz \%0 > /dev/ttyS0 < /dev/ttyS0 set speed 38400 set carrier-watch off set prefixing all set parity none set stop-bits 1 set modem none set file type bin set file name lit set flow-control none set prompt "Sparc Linux Kermit> " c Now, load your kernel image (image.dsu) generated with Snapgear and to see your konsole running on kermit. 4 - Libtheora running on LINUX /theora_hardware/ !!!!!!!!!!!!!!!111 mudar lah em cima Component Vendor LEON3 SPARC V8 Processor Gaisler Research AHB Debug UART Gaisler Research AHB Debug JTAG TAP Gaisler Research LEON2 Memory Controller European Space Agency AHB/APB Bridge Gaisler Research LEON3 Debug Support Unit Gaisler Research Generic APB UART Gaisler Research inserir arquivos!!! Libtheroa compilation for Linux on LEON3 Now, you can use the original dump_video.c because you are using the linux. Then, you can to work with files. # Export sparc-linux PATH export PATH=/opt/sparc-linux/bin/:$PATH # Clean all make distclean cd libogg-1.1.3/ make distclean # Set CROSS-Compiler and parameters export CC=sparc-linux-gcc export CXX=sparc-linux-gcc export CFLAGS='-msoft-float -fPIC -static' # -msoft-float emulate floating-point - must be used if no FPU exists in the system # -g generate debugging information - must be used for debugging with gdb # -fPIC generate position independent machine code. It is necessary because we are using linux now. # -static when linking an application static, all code used from libraries are included into the output binary #Configure and install OGG lib ./configure --prefix=/homes_export/andre.lnc/theora/libtheora6_hard/ --target=sparc-linux --host=sparc-linux --enable-static make make install #Configure and make Theora for LEON (sparc) cd ../ ./configure --prefix=/homes_export/andre.lnc/theora/libtheora6_hard/ --target=sparc-linux --host=sparc-linux --enable-static make How to do the test on figure 4 After generate the binary for LINUX on LEON3, you need to do a copy of this to /snapgear-p33/romfs/home/ and to make a image of linux kernel with the Theora compiled (dump_video). Don`t forget to do a copy of some video to /snapgear-p33/romfs/home/. Take care about size of your linux image, your SDRAM of FPGA needs to have space for this. Then: Programmer your board with LEON3; Load the linux image on LEON3 (using grmon); Open your kermit interface and set the configuration; Run the linux kernel (using grmon); Come back to kermit and you will see a konsole of Linux; Now, go to home (cd home) and run the dump_video (./dump_video video.ogg); 5 - A Peripheral on LEON3 AHB and APB bus [to complete] AMBA Protocol You can see details: http://www.gaisler.com/doc/amba.pdf Why APB interface was choosed. I was searching on teses and articles in order to decide where would be the best place for Theora Hardware and how I could to do the communication between software and hardware by bus and to pass the datas for hardware. I found many differents solution. The AHB is a high speed bus suitable to connect units with high data rate. But, the problem is that the Theora Hardware will be a Master on AHB bus and could overload the bus and diminish the performance of LEON3. APB is slower than AHB. However the protocol is simpler than AHB and don't disturb the communication between LEON3 and Memory controller. Also, I found hybrids solution with APB and AHB, but I thought better to plug this just on APB bus. 6 - Pluging Theora Hardware on LEON3 How to include the Theora APB core Create the path grlib/lib/opencores/theora_hardware Include ¨theora_hardware¨ on grlib/lib/opencores/dir.txt Download the revison 13432 from SVN on grlib/lib/opencores/theora_hardware/: http://svn.xiph.org/trunk/theora-fpga/ You will need to change the name of entity syncram to tsyncram of the modules: Syncram, expand block, loopfilter, copyrecon, databuffer. It is because syncram is a name used in other different component from LEON3. Now, we need to create the theora_hardware.vhd and theora_amba_interface.vhd: Create vhdlsyn.txt on grlib/lib/opencores/theora_hardware/vhdlsyn.txt and include all the vhdl`s You should include the Theora Hardware APB/AMBA (OPENCORES_THEORA_HARDWARE on VENDOR_OPENCORES) just changing the file devices.vhd (grlib/lib/grlib/amba/). Finally, we need instantiate the theora_hardware on leon3.vhd and take care about to use a selector free of APB slave output vector (apbo(i)). Before synthesis ("make quartus"), Type the commands "make distclean" and "make script" on your path (design grlib/designs/leon3-altera-ep2s60-sdr/). How to do a Software interface sparc-elf-gcc -mv8 -msoft-float -g hello.c -o hello.exe About ReconRefFrames How it is working / Handshake / Sequence of datas input [to complete] Addressing protocol that I did between Software Interface and Theora_amba_interface [to complete] How to do a Theora_amba_interface [to complete] 7 - Integration Software and Hardware of Theora decoder on LEON3 Send Theora() How to cut LIBTHEORA / How to do the comunication with Driver Theora [to complete] cp lib dct_decode.c code_internal.h ... Driver Theora snapgear-p33/linux-2.6.21.1/drivers/char/ theora.c obj-$(CONFIG_THEORA) += theora_driver.o Makefile Kconfig snapgear-p33/vendors/gaisler/leon3mmu/Makefile How to do / Character Device / How it is working / How to include it on linux / initialization [to complete] Problems (how to solve): - Unable to handle kernel paging request at virtual address [to complete] - alloc_io_res(phys_80000800): cannot occupy / ioremap: done with statics, switching to malloc [to complete] - BUG: soft lockup detected on CPU#0! [to complete] #define VEZES_RR 100000